This relates to integrated circuits with memory and, more particularly, to volatile memory elements.
Integrated circuits often contain volatile memory elements. A volatile memory element retains data only so long as the integrated circuit is powered. In the event of power loss, the data in the volatile memory element is lost. Although nonvolatile memory elements such as memory elements based on electrically-erasable programmable read-only memory technology are not subject to data loss in this way, it is often not desirable or possible to fabricate nonvolatile memory elements as part of a given integrated circuit.
As a result, volatile memory elements are often used. For example, static random-access memory (SRAM) chips contain SRAM cells, which are a type of volatile memory element. In programmable logic device integrated circuits, SRAM cells may serve as configuration random access memory (CRAM) cells. Programmable logic devices are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. CRAM cells are used to store configuration data supplied by the user. Once loaded, CRAM cells supply control signals to transistors to configure the transistors to implement the desired logic function.
Volatile memory elements such as SRAM and CRAM cells are typically based on cross-coupled inverters (latches). In each memory element, the cross-coupled inverters are connected to an address transistor that is turned on when data is being read from or written into the memory element. When no data is being read from or written into the memory element, the address transistor is turned off to isolate the memory element. Cross-coupled inverters and address transistors can be formed from complementary metal-oxide-semiconductor (CMOS) transistors such as re-channel metal-oxide-semiconductor (NMOS) and p-channel metal-oxide-semiconductor (PMOS) transistors.
As semiconductor technology scales towards smaller sizes, lower power supply voltages may be used to power integrated circuits. Lower power supply voltages and smaller devices may lead to decreased read and write margins for volatile memory elements. This can pose challenges for reliable device operation.